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Datasheet File OCR Text: |
this is information on a product in full production. november 2014 docid026289 rev 3 1/145 stm32f411xc stm32f411xe arm ? cortex ? -m4 32b mcu+fpu, 125 dmips, 512kb flash, 128kb ram, usb otg fs, 11 ti ms, 1 adc, 13 comm. interfaces datasheet - production data features ? dynamic efficiency line with bam (batch acquisition mode) ? core: arm ? 32-bit cortex ? -m4 cpu with fpu, adaptive real-time accelerator (art accelerator?) allowing 0-wait state execution from flash memory, frequency up to 100 mhz, memory protection unit, 125 dmips/1.25 dmips/ mhz (dhrystone 2.1), and dsp instructions ? memories ? up to 512 kbytes of flash memory ? 128 kbytes of sram ? clock, reset and supply management ? 1.7 v to 3.6 v applic ation supply and i/os ? por, pdr, pvd and bor ? 4-to-26 mhz crystal oscillator ? internal 16 mhz factory-trimmed rc ? 32 khz oscillator for rtc with calibration ? internal 32 khz rc with calibration ? power consumption ? run: 100 a/mhz (peripheral off) ? stop (flash in stop mode, fast wakeup time): 42 a typ @ 25c; 65 a max @25 c ? stop (flash in deep power down mode, fast wakeup time): down to 10 a @ 25 c; 30 a max @25 c ? standby: 2.4 a @25 c / 1.7 v without rtc; 12 a @85 c @1.7 v ?v bat supply for rtc: 1 a @25 c ? 112-bit, 2.4 msps a/d converter: up to 16 channels ? general-purpose dma: 16-stream dma controllers with fifos and burst support ? up to 11 timers: up to six 16-bit, two 32-bit timers up to 100 mhz, each with up to four ic/oc/pwm or pulse counter and quadrature (incremental) encoder input, two watchdog timers (independent and window) and a systick timer ? debug mode ? serial wire debug (swd) & jtag interfaces ?cortex ? -m4 embedded trace macrocell? ? up to 81 i/o ports wit h interrupt capability ? up to 78 fast i/os up to 100 mhz ? up to 77 5 v-tolerant i/os ? up to 13 communi cation interfaces ? up to 3 x i 2 c interfaces (smbus/pmbus) ? up to 3 usarts (2 x 12.5 mbit/s, 1 x 6.25 mbit/s), iso 7816 interface, lin, irda, modem control) ? up to 5 spi/i2ss (up to 50 mbit/s, spi or i2s audio protocol, spi2 and spi3 with muxed full-duplex i 2 s to achieve audio class accuracy via internal audio pll or external clock ? sdio interface (sd/mmc/emmc) ? advanced connectivity: usb 2.0 full-speed device/host/otg controller with on-chip phy ? crc calculation unit ? 96-bit unique id ? rtc: subsecond accuracy, hardware calendar ? all packages (wlcsp49, lqfp64/100, ufqfpn48, ufbga100) are ecopack ? 2 table 1. device summary reference part number stm32f411xc stm32f411cc, stm32f411rc, stm32f411vc stm32f411xe stm32f411ce, stm32f411re, STM32F411VE wlcsp49 wlcsp49 lqfp100 (14 14 mm) lqfp64 (10 10 mm) ) % * $ ufqfpn48 (7 7 mm) ufbga100 (7 7 mm) (3.034 x 3.220 mm) www.st.com
contents stm32f411xc stm32f411xe 2/145 docid026289 rev 3 contents 1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.1 compatibility with stm32f4 series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.1 arm ? cortex ? -m4 with fpu core with embedded flash and sram . . . 16 3.2 adaptive real-time memory accelerator (art accelerator?) . . . . . . . . . 16 3.3 batch acquisition mode (bam) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.4 memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.5 embedded flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.6 crc (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 17 3.7 embedded sram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.8 multi-ahb bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.9 dma controller (dma) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.10 nested vectored interrupt controller (nvic) . . . . . . . . . . . . . . . . . . . . . . . 19 3.11 external interrupt/event controller (exti) . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.12 clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.13 boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.14 power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.15 power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.15.1 internal reset on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.15.2 internal reset off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.16 voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.16.1 regulator on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.16.2 regulator off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.16.3 regulator on/off and in ternal power supply super visor availability . . 25 3.17 real-time clock (rtc) and backup registers . . . . . . . . . . . . . . . . . . . . . . 25 3.18 low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.19 v bat operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.20 timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.20.1 advanced-control timers (tim1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 docid026289 rev 3 3/145 stm32f411xc stm32f411xe contents 5 3.20.2 general-purpose timers (timx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.20.3 independent watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.20.4 window watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.20.5 systick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.21 inter-integrated circuit interface (i2c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.22 universal synchronous/asynchronous re ceiver transmitters (usart) . . 29 3.23 serial peripheral interface (spi) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.24 inter-integrated sound (i 2 s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.25 audio pll (plli2s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.26 secure digital input/output interface (sdio) . . . . . . . . . . . . . . . . . . . . . . . 31 3.27 universal serial bus on-the-go full-speed (otg_fs) . . . . . . . . . . . . . . . . 31 3.28 general-purpose input/outputs (gpios) . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.29 analog-to-digital converter (adc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3.30 temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3.31 serial wire jtag debug port (swj-dp) . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3.32 embedded trace macrocell? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4 pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5 memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 6 electrical characteristi cs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 6.1 parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 6.1.1 minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 6.1.2 typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 6.1.3 typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 6.1.4 loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 6.1.5 pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 6.1.6 power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 6.1.7 current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 6.2 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 6.3 operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 6.3.1 general operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 6.3.2 vcap1/vcap2 external capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 6.3.3 operating conditions at power-up/power-down (regulator on) . . . . . . . 64 6.3.4 operating conditions at power-up / power-down (regulator off) . . . . . 65 contents stm32f411xc stm32f411xe 4/145 docid026289 rev 3 6.3.5 embedded reset and power control bloc k characteristics . . . . . . . . . . . 65 6.3.6 supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 6.3.7 wakeup time from low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 6.3.8 external clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 6.3.9 internal clock source charac teristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 6.3.10 pll characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 6.3.11 pll spread spectrum clock generatio n (sscg) characteristics . . . . . . 89 6.3.12 memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 6.3.13 emc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 6.3.14 absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . . 94 6.3.15 i/o current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 6.3.16 i/o port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 6.3.17 nrst pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 6.3.18 tim timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 6.3.19 communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 6.3.20 12-bit adc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 6.3.21 temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 6.3.22 v bat monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 6.3.23 embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 6.3.24 sd/sdio mmc/emmc card host interface (sdio) characteristics . . . 117 6.3.25 rtc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 7 package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 7.1 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 7.1.1 wlcsp49, 3.034 x 3.22 mm, 0.4 mm pitch wafer level chip size package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 7.1.2 ufqfpn48, 7 x 7 mm, 0.5 mm pitch package . . . . . . . . . . . . . . . . . . 124 7.1.3 lqfp64, 10 x 10 mm, 64-pin low-profile quad flat package . . . . . . . . 127 7.1.4 lqfp100, 14 x 14 mm, 100-pin low-profile quad fl at package . . . . . . 130 7.1.5 ufbga100, 7 x 7 mm, 0.5 mm pitch package . . . . . . . . . . . . . . . . . . 133 7.2 thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136 7.2.1 reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136 8 part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 appendix a recommendations wh en using the internal r eset off . . . . . . . . 139 a.1 operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139 docid026289 rev 3 5/145 stm32f411xc stm32f411xe contents 5 appendix b application block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 b.1 usb otg full speed (fs) interface solutions . . . . . . . . . . . . . . . . . . . . 140 b.2 sensor hub application example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141 b.3 batch acquisition mode (bam) example . . . . . . . . . . . . . . . . . . . . . . . . . 143 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144 list of tables stm32f411xc stm32f411xe 6/145 docid026289 rev 3 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. stm32f411xc/xe features and peripheral counts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 3. regulator on/off and internal power supply superv isor availability. . . . . . . . . . . . . . . . . 25 table 4. timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 5. comparison of i2c analog and digital filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 6. usart feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 7. legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 table 8. stm32f411xc/xe pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 8 table 9. alternate function mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 table 10. stm32f411xc/xe register boundary addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 table 11. voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 table 12. current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 table 13. thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 table 14. general operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 table 15. features depending on the operating power supply range . . . . . . . . . . . . . . . . . . . . . . . . 63 table 16. vcap1/vcap2 operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 table 17. operating conditions at power-up / power-down (r egulator on) . . . . . . . . . . . . . . . . . . . . 64 table 18. operating conditions at power-up / power-down (r egulator off). . . . . . . . . . . . . . . . . . . . 65 table 19. embedded reset and power control block characterist ics. . . . . . . . . . . . . . . . . . . . . . . . . . 65 table 20. typical and maximum current consumption, code with data processing (art accelerator disabled) running from sram - v dd = 1.7 v . . . . . . . . . . . . . . . . . . . . . . . . . . 67 table 21. typical and maximum current consumption, code with data processing (art accelerator disabled) running from sram - v dd = 3.6 v . . . . . . . . . . . . . . . . . . . . . . . . . . 68 table 22. typical and maximum current consumption in run mode, code with data processing (art accelerator enabled except pr efetch) running from flash memory- v dd = 1.7 v . . . 69 table 23. typical and maximum current consumption in run mode, code with data processing (art accelerator enabled except pref etch) running from flash memory - v dd = 3.6 v . . 70 table 24. typical and maximum current consumption in run mode, code with data processing (art accelerator disabled) running from flash memory - v dd = 3.6 v. . . . . . . . . . . . . . . 71 table 25. typical and maximum current consumption in run mode, code with data processing (art accelerator enabled with prefetch) running from flash memory - v dd = 3.6 v . . . . . 72 table 26. typical and maximum current consumption in sleep mode - v dd = 3.6 v . . . . . . . . . . . . . 73 table 27. typical and maximum current consumptions in stop mode - v dd = 1.7 v . . . . . . . . . . . . . 73 table 28. typical and maximum current consumption in stop mode - v dd =3.6 v. . . . . . . . . . . . . . . 74 table 29. typical and maximum current consumption in standby mode - v dd = 1.7 v . . . . . . . . . . . 74 table 30. typical and maximum current consumption in standby mode - v dd = 3.6 v . . . . . . . . . . . 74 table 31. typical and maximum current consumptions in v bat mode. . . . . . . . . . . . . . . . . . . . . . . . 75 table 32. switching output i/o current cons umption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 table 33. peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 table 34. low-power mode wakeup timings (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 table 35. high-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 table 36. low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 table 37. hse 4-26 mhz oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 table 38. lse oscillator characteristics (f lse = 32.768 khz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 table 39. hsi oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 table 40. lsi oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 table 41. main pll characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 table 42. plli2s (audio pll) characteristic s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 docid026289 rev 3 7/145 stm32f411xc stm32f411xe list of tables 7 table 43. sscg parameter constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 table 44. flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 table 45. flash memory programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 table 46. flash memory programming with v pp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 table 47. flash memory endurance and data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 table 48. ems characteristics for lqfp100 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 table 49. emi characteristics for lqfp100 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 table 50. esd absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 table 51. electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 table 52. i/o current injection susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 table 53. i/o static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 table 54. output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 table 55. i/o ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 table 56. nrst pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 table 57. timx characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 table 58. i 2 c characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 table 59. scl frequency (f pclk1 = 50 mhz, v dd = v dd_i2c = 3.3 v) . . . . . . . . . . . . . . . . . . . . . . . . 103 table 60. spi dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 table 61. i 2 s dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 table 62. usb otg fs startup time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 table 63. usb otg fs dc electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 table 64. usb otg fs electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 table 65. adc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 table 66. adc accuracy at f adc = 18 mhz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 table 67. adc accuracy at f adc = 30 mhz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 table 68. adc accuracy at f adc = 36 mhz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 table 69. adc dynamic accuracy at f adc = 18 mhz - limited test conditions . . . . . . . . . . . . . . . . . 113 table 70. adc dynamic accuracy at f adc = 36 mhz - limited test conditions . . . . . . . . . . . . . . . . . 113 table 71. temperature sensor characteristic s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6 table 72. temperature sensor calibration values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 table 73. v bat monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 table 74. embedded internal reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 table 75. internal reference voltage calibration values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 table 76. dynamic characteristics: sd / mmc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 table 77. dynamic characterist ics: emmc characteristics v dd = 1.7 v to 1.9 v . . . . . . . . . . . . . . . 119 table 78. rtc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 table 79. stm32f411xc/xe wlc sp49 wafer leve l chip size package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 table 80. wlcsp49 recommended pcb design rules (0.4 mm pitch) . . . . . . . . . . . . . . . . . . . . . . 123 table 81. ufqfpn48, 7 x 7 mm, 0.5 mm pitch, package mechanical data . . . . . . . . . . . . . . . . . . . 124 table 82. lqfp64, 10 x 10 mm, 64-pin low-profile quad flat package mechanical data . . . . . . . . . 128 table 83. lqpf100, 14 x 14 mm, 100-pin low-profile quad flat package mechanical data . . . . . . . 131 table 84. ufbga100, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid array package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 table 85. ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 table 86. device order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138 table 87. limitations depending on the operating power supply range . . . . . . . . . . . . . . . . . . . . . . 139 table 88. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144 list of figures stm32f411xc stm32f411xe 8/145 docid026289 rev 3 list of figures figure 1. compatible board design for lqfp100 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 2. compatible board design for lqfp64 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 3. stm32f411xc/xe block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 4. multi-ahb matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 5. power supply supervisor interconnection with in ternal reset off . . . . . . . . . . . . . . . . . . . 21 figure 6. regulator off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 7. startup in regulator off: slow v dd slope - power-down reset risen after v cap_1 /v cap_2 stabilization. . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 8. startup in regulator off mode: fast v dd slope - power-down reset risen before v cap_1 /v cap_2 stabilization . . . . . . . . . . . . . . . . . . . . . . . 24 figure 9. stm32f411xc/xe wlcsp49 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 10. stm32f411xc/xe ufqfpn48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 figure 11. stm32f411xc/xe lqfp64 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 figure 12. stm32f411xc/xe lqfp100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 figure 13. stm32f411xc/xe ufbga100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 figure 14. memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 figure 15. pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 figure 16. input voltage measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 figure 17. power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 figure 18. current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 figure 19. external capacitor c ext . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 figure 20. typical v bat current consumption (lse in low-drive mo de and rtc on). . . . . . . . . . . . . 75 figure 21. low-power mode wakeup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 figure 22. high-speed external clock source ac timing diagra m . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 figure 23. low-speed external clock source ac timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 figure 24. typical application with an 8 mhz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 figure 25. typical application with a 32.768 khz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 figure 26. acc hsi versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 figure 27. acc lsi versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 figure 28. pll output clock waveforms in center spread mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 figure 29. pll output clock waveforms in down spread mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 figure 30. ft i/o input ch aracteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 figure 31. i/o ac characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 figure 32. recommended nrst pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 figure 33. i 2 c bus ac waveforms and measurement circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 figure 34. spi timing diagram - slave mode and cpha = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 figure 35. spi timing diagram - slave mode and cpha = 1 (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 figure 36. spi timing diagram - master mode (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 figure 37. i 2 s slave timing diagram (philips protocol) (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 figure 38. i 2 s master timing diag ram (philips protocol) (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 figure 39. usb otg fs timings: definition of data signal rise and fall time . . . . . . . . . . . . . . . . . . . 110 figure 40. adc accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 figure 41. typical connection diagram using the adc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 figure 42. power supply and reference decoupling (v ref+ not connected to v dda ). . . . . . . . . . . . . 115 figure 43. power supply and reference decoupling (v ref+ connected to v dda ). . . . . . . . . . . . . . . . 115 figure 44. sdio high-speed mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 figure 45. sd default mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 figure 46. wlcsp49 wafer level chip size package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 docid026289 rev 3 9/145 stm32f411xc stm32f411xe list of figures 9 figure 47. wlcsp49 0.4 mm pitch wafer level chip size recommended footprint . . . . . . . . . . . . . . 122 figure 48. example of wlcsp49 marking (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 figure 49. ufqfpn48, 7 x 7 mm, 0.5 mm pitch, package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . 124 figure 50. ufqfpn48 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 figure 51. example of ufqfpn48 marking (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126 figure 52. lqfp64, 10 x 10 mm, 64-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . 127 figure 53. lqfp64 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8 figure 54. example of lqfp64 marking (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 figure 55. lqfp100, 14 x 14 mm, 100-pin low-profile quad flat package outline . . . . . . . . . . . . . . . 130 figure 56. lqfp100 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 figure 57. example of lqpf100 marking (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 figure 58. ufbga100, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid array package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 figure 59. recommended pcb design rules for pads (0.5 mm-pitch bga) . . . . . . . . . . . . . . . . . . . 134 figure 60. example of ufbga100 marking (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 figure 61. usb controller configured as peripheral-only and used in full-speed mode . . . . . . . . . . 140 figure 62. usb controller configured as host-only and used in full-speed mode. . . . . . . . . . . . . . . 140 figure 63. usb controller configured in dual mode and used in full-speed mode . . . . . . . . . . . . . . 141 figure 64. sensor hub application example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141 figure 65. batch acquisition mode (bam) example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143 introduction stm32f411xc stm32f411xe 10/145 docid026289 rev 3 1 introduction this datasheet provides the description of the stm32f411xc/xe line of microcontrollers. the stm32f411xc/xe datasheet should be read in conjunction with rm0383 reference manual which is available from the stmicroelectronics website www.st.com . it includes all information concerning flash memory programming. for information on the cortex ? -m4 core, please refer to the cortex ? -m4 programming manual (pm0214) available from www.st.com. docid026289 rev 3 11/145 stm32f411xc stm32f411xe description 56 2 description the stm32f411 x c/ x e devices are based on the high-performance arm ? cortex ? -m4 32- bit risc core operating at a frequen cy of up to 100 mhz. its cortex ? -m4 core features a floating point unit (fpu) single precision which supports all arm single-precision data- processing instructions and data types. it also implements a full set of dsp instructions and a memory protection unit (mpu) which enhances application security. the stm32f411xc/xe belongs to the stm32 dynamic efficiency ? product line (with products combining power efficiency, performance and integration) while adding a new innovative feature called batch acquisition mode (bam) allowing to sa ve even more power consumption during data batching. the stm32f411xc/xe incorporate high-speed embedded memories (up to 512 kbytes of flash memory, 128 kbytes of sram), and an extensive range of enhanced i/os and peripherals connected to two apb buses, two ah b bus and a 32-bit mu lti-ahb bus matrix. all devices offer one 12-bit adc, a low-pow er rtc, six general-purpose 16-bit timers including one pwm timer for motor control, tw o general-purpose 32-bit timers. they also feature standard and advanced communication interfaces. ? up to three i 2 cs ? five spis ? five i 2 ss out of which two are full duplex. to achieve audio class accuracy, the i 2 s peripherals can be clocked via a dedicated internal audio pll or via an external clock to allow synchronization. ? three usarts ? sdio interface ? usb 2.0 otg full speed interface refer to table 2: stm32f411xc/xe features and peripheral counts for the peripherals available for each part number. the stm32f411xc/xe operate in the ?40 to +105 c temperature range from a 1.7 (pdr off) to 3.6 v power supply. a comprehensive set of power-saving m ode allows the design of low-power applications. these features make the stm32f411xc/xe micr ocontrollers suitable for a wide range of applications: ? motor drive and application control ? medical equipment ? industrial applications: plc, inverters, circuit breakers ? printers, and scanners ? alarm systems, video intercom, and hvac ? home audio appliances ? mobile phone sensor hub figure 3 shows the general block diagram of the devices. description stm32f411xc stm32f411xe 12/145 docid026289 rev 3 table 2. stm32f411xc/xe features and peripheral counts peripherals stm32f411xc stm32f411xe flash memory in kbytes 256 512 sram in kbytes system 128 timers general- purpose 7 advanced- control 1 communication interfaces spi/ i 2 s 5/5 (2 full duplex) i 2 c3 usart 3 sdio 1 usb otg fs 1 gpios 36 50 81 36 50 81 12-bit adc number of channels 1 10 16 10 16 maximum cpu frequency 100 mhz operating voltage 1.7 to 3.6 v operating temperatures ambient temperatures: ?40 to +85 c/?40 to +105 c junction temperature: ?40 to + 125 c package wlcsp49 ufqfpn48 lqfp64 ufbga100 lqfp100 wlcsp49 ufqfpn48 lqfp64 ufbga100 lqfp100 docid026289 rev 3 13/145 stm32f411xc stm32f411xe description 56 2.1 compatibility with stm32f4 series the stm32f411xc/xe are fully software and f eature compatible with the stm32f4 series (stm32f42x, stm32f401, stm32f43x, stm32f41x, stm32f405 and stm32f407) the stm32f411xc/xe can be used as drop-in replacement of the other stm32f4 products but some slight changes have to be done on the pcb board. figure 1. compatible board design for lqfp100 package 0 6 9 3 ' 3 ' 3 ' 3 ' 3 % 3 % 3 % 3 % 3 ( 3 ( 3 ( 3 ( 3 ( 3 ( 3 % 9 & |